Modern computer systems include a Central Processing Units (CPU 101) interconnected to system memory 103 (i.e., the CPU/memory subsystem.) As shown in FIG. 1, data and other signals are transmitted between the CPU and system memory via a component commonly referred to as a host bridge 105. The host bridge 105 may also provide other components and/or subsystems in a computer with an interface to the CPU/memory subsystem.
For example, as further shown in FIG. 1, peripheral components (e.g., a keyboard 109, disk drive 110 and/or mouse 111) may be interconnected to each other via a input/output (I/O) bridge 107. The I/O bridge 107, in turn, may be interconnected with the host bridge 105 to provide an interface between the peripherals and the CPU/memory subsystem.
Additional external busses (e.g., a Peripheral Component Interconnect (PCI) bus 113), however, may also join the interface between the I/O bridge 107 and the CPU/memory subsystem. As a result, the interface between the I/O bridge 107 and CPU/memory subsystem is further complicated and restricted by the specifications/requirements of an external bus 113 (e.g., PCI) which joins the interface between the I/O bridge 107 and the CPU/memory subsystem.
As a result, there is a need for an improved interface between peripheral components and the processor/memory subsystems.